m68hc05-sim

Here is a port of a simple simulator for the m68hc05 availeable, which is based on the m68hc11 version. It simulates only the processor core without any IO. As memory 64k of ram are available. The simulator is intended for running regessiontests and debugging algorithmens.

Interruptes are not supported, the opcode 0xA7 is used as breakpoint. With the emulos option, swi starts an system call. The X-register contains the number. The following are implemented:

0 Exit with exit-code in register A
1 print character in register A
2 read character and store in register A

The newest patched source is available in the GIT repository.

Questions should be directed to our mailing list (SF.net archive).