file name: utcsu.hpp
classification: simulation
contents: struct S_GPUread, struct S_SSUread, struct SUtcsuRead,
struct S_SSUwrite, struct SUtcsuWrite, NumberOfGPU, NumberOfSSU
use: provide access structures for the registers of the UTCSU
global items used:
global items defined:
NumberOfGPU:
the number of GPS units on the UTCSU (3)
NumberOfSSU:
the number of Synchronization Subnet Units on the UTCSU (6)
structures:
All structures are used for accessing registers of the UTCSU. Some units are replicated: for these, additional structures are needed. Reading and writing to the same address accesses different registers, so structures for read and for write access differ. The structures only use 32 bit access, even for registers that are split or where less than 32 bits are used. The register names are the same as in the dissertation of Loy, p.74. Where registers are split, the first name stands for the complete 32 bit register.
S_GPUread:
For read access to one GPU. The UTCSU contains three GPS units, which are
accessed through SUtcsuRead::gpu[], where GPU1 is the first item
in the array (and thus has index 0).
S_SSUread:
For read access to one SSU. The UTCSU contains six Synchronization Subnet
Units, which are accessed through SUtcsuRead::ssu[], where SSU1
is the first item in the array (and thus has index 0).
S_SSUwrite:
For write access to one SSU. The SSUs are accessed through array SUtcsuWrite::ssu[],
SSU1 has index 0.
SUtcsuRead:
For read access to the complete UTCSU. In addition, the structure contains
enumerations for all configuration, status and interrupt bits of registers
UTCCONF, UTCSTAT and UTCINTSTAT.
SUtcsuWrite:
For write access to the complete UTCSU. Again, the structure contains enumerations
for all configuration and interrupt bits of registers UTCCONF, UTCINTEN
and UTCINTENCLEAR.